Memory & Storage · lesson 1 of 4 · about 40 min
How memory really works
Before speed and databases, understand the machine. How can a piece of silicon, glass or rust remember a 0 or a 1? How does it write, how does it read, and why is each one fast, slow, forgetful or cheap? No prior knowledge needed. Tap any for its meaning.
- 1Bits, bytes and addresses3 min
- 2CPU cache: a loop that holds itself3 min
- 3RAM: a leaky bucket5 min
- 4SSD: electrons in glass4 min
- 5Hard disk: tiny magnets5 min
- 6Open the case: parts of each device4 min
- 7Where the nanoseconds go3 min
- 8What really happens on Save3 min
- 9One read, end to end3 min
- 10Cheat sheet2 min
- 11Check yourself3 min
The starting point
Memory is a long street of numbered boxes.
Each byte sits in a box with a number on the door, its . The CPU never asks for “my photo”. It asks for “the byte at address 40,000”.
There are only two things memory ever does:
- WRITE: put a value into the box at an address.
- READ: tell me what is in the box at this address.
Everything else in this lesson is about how a real piece of hardware remembers a switch, and why different hardware does it with different speed, price and forgetfulness.
Letters are numbers too. The capital H is stored as 72. Try it with the switches.
1. Make a byte. Click the switches (each one is a bit; the numbers show what it is worth).
2. Memory. Pick an address, then write the byte there, or read what is already there.
Flip the switches above to make a number, then store it at an address.
The real question: how can matter remember a 0 or 1? There are four common answers, and the next scenes open each one.
- A loop that holds itselfCPU cache (SRAM). Very fast, very small.
- Charge in a leaky bucketRAM (DRAM). Fast, forgets in a blink unless refreshed.
- Electrons trapped in glassSSD (flash). Keeps data without power.
- Tiny magnetsHard disk. Keeps data, but a motor must move.
Way 1 · A loop that holds itself
CPU cache: two gates holding each other.
This is , the memory inside the CPU's L1, L2 and L3 caches. One bit is the state of that ring. It uses about six per bit.
- Why it is fast: reading just looks at the ring. No waiting, no charging, and it sits millimetres from the CPU core.
- Why it is small and costly: six transistors per bit takes a lot of silicon, so a CPU holds megabytes of it, not gigabytes.
- Why it forgets: the ring is held up by live electricity. No power, no ring.
Write a 1, then a 0, then cut the power. Watch what “volatile” means.
The cell holds a 0. Write a 1, then cut the power.
Way 2 · Charge in a leaky bucket
RAM: one bucket and one tap per bit.
Reading is delicate. The charge in one bucket is tiny, so the chip connects it to a long wire and a detects the faintest change. That drains the bucket, so the value is written straight back. Reading destroys, then restores.
Forgetting: the bucket leaks. Within about a tenth of a second the 1 would fade away, so the chip every row every 64 ms, forever. That constant upkeep is part of why RAM is slower than cache.
Write a 1, wait 100 ms, and watch it leak. Then turn refresh on and try again.
An empty bucket stores 0. Fill it with Write 1.
How the cells are arranged. Millions of buckets form a grid. To read, the chip first opens a whole row into a row buffer (slow: about 30 ns plus 15 ns to close), then picks columns from the open row (fast: 15 ns each). Read 16 bytes two ways:
Pick a pattern. Compare how many times a row must be opened.
Way 3 · Electrons trapped in glass
SSD: a transistor with a locked room.
- Read: apply a test voltage and see whether current flows. Gentle, quick, repeatable.
- Write (program): force electrons through the glass with a high voltage. Slower, and checked after each pulse.
- Erase: remove the electrons. It can only be done for a whole block at once. That is why an SSD cannot overwrite a page in place (the garbage-collection scene).
More charge levels means more bits per cell (), cheaper drives, but narrower gaps between levels and fewer before the glass wears out.
Choose QLC and program the cell. Notice how little room there is between neighbouring levels.
The charge range is divided into 8 bands. The band the cell falls in is the value it stores (3 bits).
The gate is empty: this cell reads as the highest value (all 1s). Program some electrons into it.
TLC: 3 bits per cell, 8 levels, reads slower, writes slower, common, cheaper. After roughly ~3,000 erase cycles the glass wears thin and electrons start to leak.
Way 4 · Tiny magnets
Hard disk: a record player that reads magnetism.
- Write: a tiny electromagnet in the head flies a hair above the spinning surface and sets the direction of each patch passing beneath.
- Read: the same head senses the magnetic field. When the direction flips between two patches, it produces a spike. Spikes are decoded back into 0s and 1s.
- Why slow: the head sits on an arm that must swing to the right ring, and then wait for the patch to spin round. Both are mechanical.
Data is arranged on the as rings (tracks) split into small arcs (sectors). Spin speed is the .
Click the patches to write your own pattern, then press Spin to watch the head read it.
One track, unrolled into a line. Click a patch to flip its magnet (that is what the write head does).
The line shows what the head senses: a spike wherever the magnetism flips.
A flip = 1, no flip = 0 (a common way to encode it, so long runs of identical patches stay readable). Result: 110110001010111 for the stored pattern.
Why reading a random block is slow. A random 4 KB read pays three times:
Average spin wait = half a turn = 30,000 ÷ rpm. At 7,200 rpm that is 4.17 ms. Moving the arm and waiting for the spin cost 100% of the time. Reading the next sector on the same track needs neither, which is why sequential reads are about 515× faster per block.
Open the case
Look inside each device.
Watch for the pattern: wherever something moves (an arm, a disk, a signal across a board), time is lost. Electronic parts are fast. Mechanical parts are slow. Distance always costs.
Words you will meet here: , , , , , , .
Tap every part of the hard disk. Count how many of them move.
Tap a part of the picture, or choose one here:
Platters
What it does. Glass or aluminium disks coated with a magnetic film, stacked on one shaft. Both sides store data, in rings (tracks) divided into sectors. The data is a pattern of tiny magnets.
Why it matters for speed. More platters means more capacity, not more speed: every head moves together on one arm assembly and only one reads at a time.
Where do the nanoseconds go?
Why exactly is each level fast or slow?
The breakdowns are illustrative: real chips differ, but the proportions are realistic. Compare the biggest piece at each level.
The pattern: L1 is fast because everything is tiny and close. RAM is slower because it leaves the chip and must charge. SSD adds software and error correction. A hard disk is slower still because metal has to move.
At which level does “waiting for something to physically move” start to dominate?
- Miss L1, L2 and L3 15 ns · 19%Three failed lookups before the CPU knows it must go to memory.
- Wait in the memory controller queue 10 ns · 13%Other requests and refresh commands are ahead of yours.
- Open the row (tRCD) 14 ns · 18%Connect a whole row of capacitors to the sense amplifiers and let them settle.
- Choose the column (CAS) 14 ns · 18%Select the wanted bytes from the open row buffer.
- Wires and burst transfer 15 ns · 19%Signals cross the board; 64 bytes come back as 8 beats.
- Fill the caches 10 ns · 13%Copy the line into L3, L2 and L1 and deliver to the core.
Leaving the chip, then the DRAM's own physics: open a row, pick a column, sense faint charges.
Putting it together
What really happens when you press Save.
Walk the data down the pipeline one step at a time, and pull the plug at different moments. This is why databases call , and why a can still lose your last few seconds of work.
*Many cheap drives lose their own on a power cut. Server drives often carry a small capacitor that saves it.
“Saved” can mean four different things, depending on which box the data has reached.
Your program has the data in its own memory. Nothing is saved yet.
Cost of being safe: write() takes ~10 µs, fsync() takes ~1 ms. That 100× gap is why durable commits are the slow part of every database.
Reading, end to end
The CPU asks for one address.
Choose where the data currently is, then press Read and watch the trip. Finding it in L1 takes about a nanosecond. Missing everything and going to disk triggers a , thanks to .
After a read the data is copied into the caches on the way back, so the second read is fast. That is how caches work in one sentence.
Try “On SSD”, then read again. Same address: about 100,000× faster the second time.
- Check L1 cache (compare the address tag)1 ns
- Miss. Check L2 cache3 ns
- Miss. Check L3 cache15 ns
- Miss. Memory controller asks the RAM chip: open the row, read the column80 ns
Press Read to send the request down the layers.
Cheat sheet
Four ways to remember a bit, side by side.
Everything you learned in one table. Notice the pattern: the more sophisticated the physics for keeping a bit cheaply and permanently, the more work every read and write has to do.
| SRAM | DRAM | NAND flash | Hard disk | |
|---|---|---|---|---|
| Where you find it | CPU caches (L1, L2, L3) | Main memory (RAM sticks) | SSDs, phones, USB sticks | HDDs, bulk and backup storage |
| How it remembers a bit | A ring of two inverters that holds itself | Charge in a tiny capacitor (full = 1) | Electrons trapped on a floating gate | Tiny magnets on a spinning platter |
| How it reads | Look at the ring. Non-destructive. | Connect to a wire, amplify the faint signal, then write the value back. | Apply a test voltage and sense the current. Quick, non-destructive. | A head senses where the magnetism flips as the platter spins past. |
| How it writes | Force the ring into the new state. | Fill or empty the capacitor. | Pulse high voltage to push electrons in, check, repeat. Erase only a whole block. | A head magnetises the patch passing underneath. |
| Why it has this speed | No waiting, tiny, on the CPU chip itself, about 1–20 ns. | Open a row, then pick a column, plus the trip off the CPU chip: about 80–100 ns. | Electrical but needs sensing and error correction: about 50–100 µs. | Slow: move an arm (seek) and wait for the spin, about 5–10 ms. |
| Forgets when power is lost? | Yes, instantly | Yes, within ~0.1 s unless refreshed; gone on power loss | No (years), wears out after limited erases | No |
| Cost per bit | Highest per bit (6 transistors) | Moderate (1 transistor + 1 capacitor) | Low (1–4 bits per transistor) | Lowest per GB |
| Typical size | KB to tens of MB | GB to TB | GB to tens of TB | Up to ~24 TB per drive |
Check yourself
Can you explain it back?
Six questions, each worth 20 XP. If you can answer these in your own words, you understand more about memory than most developers.
Explain with the physical story: “a leaky bucket that must be refreshed” beats “it is volatile”.
How does a DRAM cell remember a 1?
Tip: press 1 to 3 to answer, Enter for the next one.